Lesson 6/2524%
MODULE 6 OF 25 15 MIN FPGA FUNDAMENTALS

AMD Xilinx FPGA Families

Navigate the complete AMD Xilinx product lineup — from low-cost Spartan to AI-enabled Versal — and learn how to select the right family for any application.

The AMD Xilinx Portfolio

AMD Xilinx (acquired by AMD in 2022) offers the world's broadest FPGA and adaptive compute portfolio. The product line spans from sub-$5 IoT devices to multi-thousand-dollar data center accelerators. Understanding which family suits your application is one of the first decisions in any FPGA project.

Spartan Family Low CostEntry Level

The Spartan series targets cost-sensitive, high-volume applications. Spartan-6 (45nm) and Spartan-7 (28nm) offer 100K–200K LUTs at $5–$20. No GTX transceivers on most devices, and basic IO capabilities. The go-to choice for IoT, consumer electronics, education platforms, and low-power industrial control. Power consumption is typically under 1W at idle.

Process: 45nm (S6), 28nm HKMG (S7)  |  LUTs: 6K–102K  |  Price: $5–$20  |  Apps: IoT, consumer, education

Artix Family Mid RangePower Optimized

Artix-7 (28nm) and Artix UltraScale+ (16nm FinFET) strike a balance between cost, power, and performance. With 100K–215K LUTs and optional GTX transceivers on larger devices, Artix handles demanding industrial, medical imaging, software-defined radio (SDR), and small video processing systems. Artix-7 is among the most widely designed-in Xilinx FPGAs.

Process: 28nm (A7), 16nm (AUP)  |  LUTs: 17K–215K  |  Price: $20–$80  |  Apps: Industrial, medical, SDR

Kintex Family Best Perf/CostHigh Performance

Kintex-7, Kintex UltraScale, and Kintex UltraScale+ are engineered to maximize the performance-per-dollar and performance-per-watt ratio. With 200K–1.14M LUTs and GTH/GTY transceivers up to 32.75 Gbps, Kintex excels in 5G wireless, radar systems, medical ultrasound, and video broadcast infrastructure. Often the first choice for engineers who need real DSP and transceiver throughput without the Virtex premium.

Process: 28nm / 20nm / 16nm  |  LUTs: 200K–1.14M  |  Price: $100–$400  |  Apps: 5G, radar, medical ultrasound

Virtex Family High EndFlagship

Virtex-7, Virtex UltraScale, and Virtex UltraScale+ represent Xilinx's highest-capacity, highest-performance devices — up to 1.4M+ LUTs, HBM (High Bandwidth Memory) stacking, and hundreds of GTY transceivers. Prices range from $500 to over $5000. Target applications: data center acceleration, aerospace and defense, test and measurement equipment, and network switching ASICs replaced by reconfigurable Virtex devices.

Process: 28nm / 20nm / 16nm  |  LUTs: up to 1.4M+  |  Price: $500–$5000+  |  Apps: Data center, defense, T&M

Zynq Family ARM + FPGASoC

Zynq is not a pure FPGA — it is a System-on-Chip that integrates a hard ARM processor with an FPGA fabric. Zynq-7000 uses a dual-core ARM Cortex-A9. Zynq UltraScale+ (ZU+) escalates to a quad-core A53 plus dual R5 real-time cores, a Mali GPU, and a video codec. The PS (Processing System) runs Linux or bare-metal; the PL (Programmable Logic) handles acceleration. Ideal for embedded systems, autonomous vehicles, robotics, and advanced motor control.

Processor: Dual A9 (Z7), Quad A53 + R5 (ZU+)  |  Process: 28nm / 16nm  |  Apps: Embedded, automotive, robotics

Versal ACAP AI EngineNext Gen

Versal is AMD's Adaptive Compute Acceleration Platform (ACAP) — a fundamentally different architecture. It combines: an AI Engine array (hundreds of SIMD vector processors optimized for AI/DSP at 100s of TOPS), traditional programmable logic (PL), ARM processing subsystem (PS), and a Network-on-Chip (NoC) for high-bandwidth internal data movement. Versal is targeted at AI inference, 5G RAN, automotive ADAS, and high-speed networking. It is not just an FPGA in the traditional sense.

Process: 7nm  |  AI Engines: 400–1,900+  |  Apps: AI/ML, 5G, automotive ADAS

Family Hierarchy

graph TD AMD[AMD Xilinx Portfolio] --> SPARTAN[Spartan\nLow Cost] AMD --> ARTIX[Artix\nPower Optimized] AMD --> KINTEX[Kintex\nBest Perf/Cost] AMD --> VIRTEX[Virtex\nHigh End] AMD --> ZYNQ[Zynq\nSoC ARM+FPGA] AMD --> VERSAL[Versal ACAP\nAI+FPGA+ARM] SPARTAN --> S7[Spartan-7\n28nm] ARTIX --> A7[Artix-7\n28nm] ARTIX --> AUP[Artix UltraScale+\n16nm] KINTEX --> K7[Kintex-7\n28nm] KINTEX --> KUS[Kintex UltraScale\n20nm] KINTEX --> KUSP[Kintex UltraScale+\n16nm] VIRTEX --> V7[Virtex-7\n28nm] VIRTEX --> VUS[Virtex UltraScale\n20nm] VIRTEX --> VUSP[Virtex UltraScale+\n16nm] ZYNQ --> Z7[Zynq-7000\nDual A9] ZYNQ --> ZUP[Zynq UltraScale+\nQuad A53+R5] VERSAL --> VAI[Versal AI Core\nAI Engine] VERSAL --> VPRIME[Versal Prime\nGeneral Purpose]

Full Family Comparison

Family Series Process LUT Count BRAM (Kb) DSP IO Transceivers Price Range Best For
Spartan Spartan-6 45nm 6K–147K up to 4,824 up to 180 up to 576 None $3–$15 Legacy, volume, basic
Spartan Spartan-7 28nm HKMG 6K–102K up to 4,860 up to 160 up to 400 None $5–$20 IoT, consumer, education
Artix Artix-7 28nm HKMG 17K–215K up to 13,140 up to 740 up to 500 GTX up to 6.6 Gbps $20–$80 Industrial, medical, SDR
Artix Artix UltraScale+ 16nm FinFET 29K–258K up to 22,500 up to 1,248 up to 448 GTH up to 16.3 Gbps $30–$150 Industrial, vision, comms
Kintex Kintex-7 28nm HKMG 200K–478K up to 34,380 up to 1,920 up to 500 GTX up to 12.5 Gbps $80–$300 5G, radar, video
Kintex Kintex UltraScale+ 16nm FinFET 224K–1,143K up to 339,840 up to 5,952 up to 832 GTY up to 32.75 Gbps $150–$500 5G RAN, medical, ML
Virtex Virtex-7 28nm HKMG 326K–1,954K up to 67,680 up to 3,600 up to 1,200 GTX/GTH up to 28 Gbps $500–$3000 Defense, T&M, networking
Virtex Virtex UltraScale+ 16nm FinFET 457K–1,728K up to 500,040 up to 9,024 up to 1,456 GTY up to 32.75 Gbps $1000–$5000+ Data center, HBM, ASIC proto
Zynq Zynq-7000 28nm 17K–444K up to 26,824 up to 2,020 up to 500 GTP/GTX optional $20–$200 Embedded, robotics, motor ctrl
Zynq Zynq UltraScale+ 16nm FinFET 72K–600K up to 70,560 up to 3,528 up to 624 GTH/GTY up to 32.75 Gbps $100–$1000 Automotive, 5G, AI edge
Versal Versal AI Core 7nm 268K–900K PL large large up to 900 GTY up to 58 Gbps $500–$3000+ AI inference, 5G, networking

Max LUT Count by Family

Process Node Progression

Device Series Process Node Key Technology Year Released
Spartan-6 45nm Low-power planar CMOS 2009
7-Series (Artix-7, Kintex-7, Virtex-7) 28nm HKMG High-K Metal Gate, SSI for large dies 2011–2012
UltraScale (Kintex US, Virtex US) 20nm TSMC 20SoC, UltraScale architecture 2014
UltraScale+ (all families) 16nm FinFET+ TSMC 16FF+, 3D IC with HBM option 2016–2018
Versal ACAP 7nm TSMC N7, AI Engine array, NoC 2021+
Engineering Tip For new designs, start with UltraScale+ unless cost is the primary constraint. The 16nm FinFET node gives significantly better performance per watt than 7-series devices at 28nm. UltraScale+ also brings architectural improvements (8 LUTs per Slice, 2 CARRY8 per Slice) that improve density and timing closure.
7-Series Still Widely Used The 7-series (Artix-7, Kintex-7, Virtex-7) remain extremely common in production. Xilinx has committed to manufacturing them for many years, tool support is mature, and community resources (tutorials, IP, reference designs) are abundant. Don't discount 7-series for new designs if cost and risk are paramount.
Interview Question: Zynq vs Versal Q: What is the difference between Zynq and Versal?
A: Zynq integrates a hard ARM processor (A9 or A53/R5) with traditional FPGA programmable logic — the processor is fixed silicon running software, the fabric is reconfigurable for hardware acceleration. Versal goes further: it adds an array of AI Engines (dedicated SIMD vector processors for AI/DSP math), a Network-on-Chip for high-bandwidth routing between subsystems, and fixed-function AI accelerators alongside the ARM PS and PL. Versal is classified as an ACAP (Adaptive Compute Acceleration Platform), not just an FPGA+CPU.
Best Practice: Device Selection Headroom Always select the smallest device that meets your requirements plus 30% resource headroom. FPGA utilization above 70% makes timing closure very difficult — routing congestion increases dramatically, and the tool struggles to meet timing constraints. Leave room to breathe.

Knowledge Check

1. Which AMD Xilinx FPGA family offers the best performance-per-dollar ratio for high-speed DSP and transceiver applications?

  • A Spartan-7
  • B Artix-7
  • C Kintex
  • D Versal ACAP
Correct! Kintex is specifically positioned as the best performance-per-cost-per-power family, with full GTH/GTY transceivers and large DSP count at a mid-range price point.

2. What process node does the Artix-7 use?

  • A 45nm
  • B 28nm HKMG
  • C 16nm FinFET
  • D 7nm
Correct! All 7-series devices (Artix-7, Kintex-7, Virtex-7) use TSMC's 28nm High-K Metal Gate (HKMG) process.

3. Which family integrates a hard ARM processor directly on the same die as the FPGA fabric?

  • A Virtex UltraScale+
  • B Kintex-7
  • C Zynq
  • D Spartan-7
Correct! Zynq is a System-on-Chip that integrates hard ARM cores (Cortex-A9 in Zynq-7000, Cortex-A53+R5 in Zynq UltraScale+) with programmable logic fabric.

4. What does ACAP stand for, and which Xilinx product uses this designation?

  • A Advanced CMOS Acceleration Platform — Kintex UltraScale+
  • B Adaptive Compute Acceleration Platform — Versal
  • C AI Compute and Processing — Zynq UltraScale+
  • D Adaptive Circuit and Algorithm Processor — Virtex
Correct! ACAP = Adaptive Compute Acceleration Platform, and Versal is AMD's ACAP product line. It includes AI Engines, a Network-on-Chip, ARM PS, and traditional PL in one device.

5. Which Xilinx family is the most cost-effective choice for a basic IoT sensor node?

  • A Spartan-7
  • B Artix-7
  • C Zynq-7000
  • D Kintex UltraScale+
Correct! Spartan-7 at $5–$20 is the most cost-effective choice for low-power, simple IoT designs that don't need transceivers or high logic density.

6. Your 5G massive MIMO baseband system needs GTY transceivers at 25+ Gbps and 800K+ LUTs. Which family is most appropriate?

  • A Artix UltraScale+
  • B Kintex UltraScale+ or Versal AI Core
  • C Spartan-7
  • D Zynq-7000
Correct! Kintex UltraScale+ offers up to 1.14M LUTs with GTY transceivers at 32.75 Gbps — ideal for 5G. Versal AI Core is also suitable for 5G with its AI Engines for DSP acceleration.

Practical Exercise

Device Selection Challenge Your radar signal processing system needs: 500K LUTs, GTH transceivers at 12 Gbps, and 800 DSP slices for matched filtering and FFT computation. The design must run from a 12V supply with a power budget under 30W.

Using the comparison table above, identify: (1) Which AMD Xilinx family fits? (2) Which specific device series? (3) What is the approximate cost? (4) Which process node would you use to meet the power budget?

Hint: Check the Kintex UltraScale+ row carefully. Cross-reference with the AMD Xilinx product selector at xilinx.com.
← FPGA vs GPU Inside an FPGA Chip →