Module 06

PCB Layout & Signal Integrity

I2C is slow, but its edges aren't. A 3 ns falling edge doesn't care that your bus runs at 100 kHz — it couples, rings, and radiates like any fast signal. A few layout habits keep it civilized.

Routing rules

  • Daisy-chain device to device; keep taps/stubs under ~1 cm. No star topologies.
  • Route SDA and SCL together but not coupled — same path, ≥ 2–3× trace-width spacing (or a ground trace between them at Fm+).
  • Keep a continuous ground reference under both lines; never cross a plane split. The return current at the edge rate flows directly beneath the trace.
  • Budget length against capacitance: ~1 pF/cm means 50 cm of routing is already 50 pF before any device pins.
  • Minimize vias (~0.5 pF each) — they add up on a 20-device chain.
  • Keep the pair away from noisy aggressors (switching nodes, motor phases, RF antennas) — I2C inputs have no differential rejection.

Crosstalk: SCL is SDA's worst enemy

The most common I2C SI failure is SCL coupling into SDA: a fast SCL falling edge induces a glitch on a tightly coupled SDA that a receiver can read as a START or a data-bit error. It shows up as "occasional NACKs" that vanish when you slow the bus down.

✓ spaced ≥ 3W, solid plane SCL SDA continuous GND plane ✗ coupled pair, split plane split! coupling + broken return path = glitches

Left: healthy spacing and return path. Right: the classic failure — tight coupling with a return path detour amplifying the glitch.

Series damping resistors

22–100 Ω in series at each driver pin slows the falling edge and damps ringing on longer runs. They also add protection against latch-up from hot-plugged lines. Two cautions: they add to VOL (the far device's low is lifted by I·R), and at Fm+ speeds they can eat too much of the timing budget. Rule: start with 0 Ω fitted, add 33 Ω if you see ringing overshoot beyond ±0.5 V on a scope.

Off-board I2C: cables and extenders

Distance Approach Notes
< 30 cm Direct, ribbon/FFC ok Put GND between SDA and SCL conductors; count cable pF
0.3 – 2 m Buffer at the connector (PCA9517) Isolates cable capacitance from the main bus; drop to 100 kHz
2 – 50 m Differential extender pair (P82B715 / PCA9615) Converts to robust differential signaling over twisted pair
> 50 m Don't — use RS-485/CAN and a bridge I2C was never meant to leave the enclosure
Deep dive on rise-time budgets, reflections and terminations? That's the Signal Integrity Academy — the concepts map directly.

Key takeaways

  • Treat edges (ns), not bit rate (kHz), as the SI-relevant speed.
  • Daisy-chain, short stubs, solid return plane, SDA/SCL spaced apart.
  • SCL→SDA crosstalk is the classic intermittent-failure mechanism.
  • Leaving the board? Buffer it. Leaving the enclosure? Go differential.
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