Lesson 4/1724%
MODULE 04

Working Principle

The device physics in working depth: radiative recombination and photon generation, optical coupling efficiency, photocurrent generation and transistor action, why CTR varies with current and temperature, and the dynamic behavior that sets switching speed limits.

Learning Objectives

After completing this module, you will be able to:

Explain photon generation from LED forward current
Trace the optical coupling path and its efficiency losses
Derive CTR behavior versus IF, temperature, and VCE
Analyze switching waveforms and storage/delay times
Predict dynamic performance from datasheet parameters
Where this fits. Module 3 (Construction) showed you the parts inside the package: an infrared LED die, a silicon detector die, and the barrier between them. This module follows one milliamp of LED current through that hardware and turns it into physics you can calculate with: photons per electron, coupling losses, photocurrent, transistor gain, saturation and switching speed. Module 6 (Parameters) then maps these mechanisms onto the datasheet numbers, and Module 10 (Design Examples) uses the small-signal model in real feedback loops.
Curves, animations and calculators on this page use a representative PC817-class phototransistor model built for teaching: LED external efficiency ≈ 3–4 %, coupling ≈ 35 %, detector quantum efficiency ≈ 70 %, peak hFE ≈ 300. The shapes and trends are typical. For design, always use the curves and min/max limits of the part you buy.

An optocoupler performs four conversions in series. Electrons become photons in the LED. Photons travel through the optical path, and some are lost. Photons become electrons again in the detector junction, as a photocurrent. The photocurrent is amplified by the detector transistor. Each step has an efficiency, and the product of the four is the number every designer cares about: the current transfer ratio (CTR).

Block chain: I_F of 5 mA multiplied by LED efficiency 3.2 percent, coupling efficiency 35 percent, detector quantum efficiency 70 percent and transistor gain about 270 gives a collector current of 10.6 mA and a CTR of about 210 percent
Figure 1. CTR is a product of four efficiencies. Less than 1 % of the LED’s electrons turn into photocurrent. The transistor’s gain of a few hundred is what brings CTR back above 100 %, and it is also why CTR depends so strongly on current and temperature.
Animation: electrons and holes recombine at the LED junction and emit photons, which cross the barrier and are absorbed at the detector base-collector junction, creating electron-hole pairs that are amplified into a stream of collector current
Animation 1. The four stages in motion. Notice how few photons actually generate an electron–hole pair in the detector, and how each pair turns into a burst of collector current through transistor gain.

Interactive: Photon-Flow Simulator

Move the LED current and watch every stage respond. The particle rates are proportional to the real currents; the numbers are calculated with the module’s PC817-class model at 25 °C and VCE = 5 V.

Optical power leaving LED–
Photocurrent IPH–
Transistor gain hFE at this IC–
Collector current IC–
CTR–

Forward-biasing the LED injects electrons into the p-side and holes into the n-side. When an electron and a hole recombine, the energy they release goes one of two ways. In radiative recombination it leaves as a photon with an energy close to the band gap (≈ 1.3–1.45 eV, i.e. 850–940 nm). In non-radiative recombination it becomes heat in the crystal lattice, through defects (Shockley–Read–Hall recombination) or three-carrier Auger processes. The LED’s job is to make the first path win.

Internal, extraction and external efficiency

ηEQE = ηIQE × ηextr     Popt = ηEQE × (1240 / λ[nm]) × IF
  • ηIQE — internal quantum efficiency: fraction of recombinations that are radiative
  • ηextr — extraction efficiency: fraction of generated photons that escape the die
  • ηEQE — external quantum efficiency: photons out per electron in
  • Popt — optical power in W when IF is in A (1240/λ is the photon energy in eV)

Internal efficiency can be high, but extraction is the killer. GaAs has a refractive index of about 3.5, so light hitting the die surface at more than a small critical angle is totally internally reflected and eventually reabsorbed. That is why simple optocoupler LEDs have external efficiencies of only a few percent.

Worked example — why so little light gets out
GaAs (n1 ≈ 3.5) into clear silicone (n2 ≈ 1.4):
  1. Critical angle: sin θc = 1.4 / 3.5 = 0.40 → θc ≈ 23.6°.
  2. Fraction of isotropic emission inside that escape cone, through one face: (1 − cos θc) / 2 = (1 − 0.917) / 2 ≈ 4.2 %.
  3. Fresnel reflection even inside the cone at normal incidence: ((3.5 − 1.4)/(3.5 + 1.4))2 ≈ 18 % lost.
  4. Side faces and back-reflection recover some light, but a few percent overall is typical: this is the ηextr term.
Worked example — optical power at 5 mA
GaAs LED at 940 nm, ηEQE ≈ 3.2 % at IF = 5 mA. Photon energy 1240 / 940 = 1.32 eV. Popt = 0.032 × 1.32 V × 5 mA ≈ 0.21 mW. The electrical input is 5 mA × 1.15 V ≈ 5.8 mW, so wall-plug efficiency is ≈ 3.6 % and the rest is heat.

The LED is still a diode: VF, IF and temperature

VF ≈ n·VT·ln(IF / IS) + IF·RS
  • n — ideality factor (≈ 1.5–2 for GaAs LEDs); VT = kT/q ≈ 25.7 mV at 25 °C
  • IS — saturation current, which rises steeply with temperature, so VF falls by ≈ 1.5–2 mV/°C
  • RS — series resistance (a few ohms); dominates at high current
Two charts. Left: forward voltage versus forward current on a log axis at minus 40, 25 and 100 degrees Celsius, falling with temperature. Right: optical output versus forward current, sub-linear at high current and lower at high temperature
Figure 2. Left: VF shifts down about 1.8 mV/°C. Right: light output is not proportional to IF. Efficiency is lower at very low current (defect recombination competes), droops at high current (Auger, heating), and falls with temperature, typically by a few tenths of a percent per °C for GaAs-family LEDs.
Pro tip — LED temperature is two temperatures. Light output depends on junction temperature. At high IF the die self-heats above ambient, so a datasheet curve measured with short pulses can look better than what you get with DC drive. The small-signal dynamic resistance rd = n·VT/IF (≈ 4 Ω at 10 mA) matters when the LED is driven by a voltage source such as a TL431 cathode: it sets the LED branch’s small-signal gain (Section 8).

Of the light that leaves the LED die, only a fraction reaches the detector’s active junction. The coupling efficiency ηc collects every geometric and optical loss between the two dies. It is fixed by the construction (Module 3), so you cannot change it as a designer. You can, however, understand why it varies between parts and over life.

Loss mechanismWhat happensTypical influence
Geometry (solid angle)The LED radiates into a wide cone; the detector subtends only part of itDominant term. Face-to-face > co-planar.
Fresnel reflectionsPartial reflection at every refractive-index step (die/silicone, silicone/film, film/die)A few % to ≈ 20 % per high-contrast interface
AbsorptionClear silicone, epoxy and polyimide absorb a little near-IRSmall when new; rises if materials yellow at high temperature
Detector fill factorLight landing on metal contacts or outside the base area generates nothing usefulSet by detector layout
Alignment toleranceDie placement and frame spacing vary from part to partA main source of CTR spread between units

Typical overall coupling efficiencies range from roughly 10 % to 50 % depending on construction. This module’s model uses 35 %.

Design trap — “CTR only degrades because of the LED”. LED ageing is the main mechanism, but optical-path darkening (yellowing of encapsulants after long exposure to high temperature) also lowers ηc. Both show up as the same symptom: less collector current for the same IF. Module 9 budgets for both together as an end-of-life factor.

A photon with more energy than silicon’s band gap (1.12 eV, i.e. wavelengths shorter than ≈ 1100 nm) can be absorbed and create an electron–hole pair. If that happens inside, or within a diffusion length of, the reverse-biased depletion region, the junction’s field sweeps the pair apart. The electron and hole flow as photocurrent. Two properties make this junction behave like a near-ideal current source:

Linear in light

Photocurrent is proportional to absorbed optical power over many decades, from nanoamps to milliamps.

Almost independent of voltage

Once reverse-biased, the junction collects the same current whatever the bias. It is a current source in parallel with the junction capacitance.

IPH = ℛ × Pabs     ℛ [A/W] = ηdet × λ[nm] / 1240
  • ℛ — responsivity: amps of photocurrent per watt of light
  • ηdet — detector quantum efficiency: pairs collected per photon arriving
  • Pabs — optical power reaching the junction (W)
Worked example — following the 0.21 mW from Section 2
  1. Light reaching the detector: 0.21 mW × ηc 0.35 ≈ 73 µW.
  2. Responsivity at 940 nm with ηdet = 0.70: 0.70 × 940/1240 ≈ 0.53 A/W. An ideal (η = 1) detector would give 0.76 A/W.
  3. IPH = 0.53 A/W × 73 µW ≈ 39 µA, from 5 mA of LED current: a ratio of 0.78 %.

With no light the junction still leaks a small dark current (thermally generated pairs). It doubles roughly every 10 °C. In a phototransistor this leakage is multiplied by hFE and appears as ICEO (Module 3, Section 3).

Pro tip — photodiode-output parts use this current directly. 6N135/6N136, 6N137 and the linear IL300/HCNR201 read the photodiode current before, or instead of, a transistor’s hFE. That is why their transfer is more linear, faster and more stable with temperature. The trade-off is a far lower “CTR”.

In a phototransistor the light-sensitive junction is the base–collector junction. Photocurrent generated there flows into the base exactly as if an external base current had been applied, and the transistor multiplies it:

IC = hFE × IPH + ICEO   ⇒   CTR = IC / IF = ηEQE × ηc × ηdet × hFE
  • Equivalent form: CTR = [Popt/IF in W/A] × ηc × ℛ[A/W] × hFE
  • ICEO — dark current, negligible except at high temperature and very low IF
  • Every factor depends on something: ηEQE(IF, T), hFE(IC, T, VCE). So CTR is a curve, not a constant.

Why CTR peaks at a middle current

Low IF: both halves weaken

LED: defect (SRH) recombination steals a larger share of carriers, so ηEQE drops. Transistor: at micro-amp base currents, surface and base recombination make hFE fall.

High IF: both halves droop

LED: Auger losses and self-heating reduce efficiency. Transistor: high-level injection makes hFE fall at large IC.

Middle: the sweet spot

For PC817-class parts CTR peaks around a few mA, which is exactly why datasheets specify CTR at IF = 5 mA.

Why CTR falls at both temperature extremes

Two effects fight. LED light output falls as temperature rises (more non-radiative recombination). Transistor hFE rises with temperature (typically a few tenths of a percent per °C). Near room temperature they roughly cancel. When cold, hFE loss wins; when hot, the LED loss wins. The net CTR curve is usually flattest around 0–40 °C and drops at both ends. The drop is steepest when hot.

Left: CTR versus forward current on a log axis at minus 40, 25 and 100 degrees, peaking near 5 mA at about 210 percent. Right: CTR relative to 25 degrees versus temperature for 1, 5 and 20 mA, flat near room temperature and falling to about 0.7 to 0.76 at 110 degrees
Figure 3. The same physics, two views. The 100 °C curve sits ≈ 20 % below the 25 °C curve at 5 mA. Low-current operation loses more at temperature because the LED’s defect recombination is more temperature-sensitive there.

CTR and VCE

Datasheets specify CTR at VCE = 5 V, where the transistor is well into its active region. Below roughly 0.5–1 V the collector–base junction starts to forward-bias, the transistor enters saturation, and the measured CTR collapses. In the model, CTR at VCE = 0.2 V is only ≈ 80 % of its 5 V value. Any “CTR at VCE(sat)” line in a datasheet is there precisely because switching designs live in this region (Section 6).

Worked example — using the datasheet’s CTR at a different IF and temperature
A PC817 rank B is guaranteed CTR ≥ 130 % at IF = 5 mA, VCE = 5 V, 25 °C. Your circuit runs at IF = 1 mA and up to 60 °C.
  1. From the normalised CTR–IF curve (here, the model): CTR(1 mA)/CTR(5 mA) ≈ 0.70.
  2. From the CTR–temperature curve at 1 mA: CTR(60 °C)/CTR(25 °C) ≈ 0.93.
  3. Worst-case new-part CTR ≈ 130 % × 0.70 × 0.93 ≈ 85 %. Still apply the ageing factor from Module 9.
  4. Caveat: normalised curves are typical. Treat the ratio as an estimate, and keep generous margin or verify on real parts.

Interactive: CTR Explorer

The plot shows CTR vs IF at −40 °C, 25 °C and 100 °C plus your chosen temperature (dashed). Move the operating point, temperature and VCE, and scale the part’s nominal CTR to represent different ranks.

CTR at this point–
IC = CTR × IF–
Relative to datasheet point (5 mA, 25 °C, 5 V)–
LED efficiency / hFE here–
–

Put a resistor RL from VCC to the collector and the transistor can do one of two things. If CTR × IF is less than the current the resistor can pass, the transistor stays in its active (linear) region. Then IC = CTR × IF and the output voltage is an analog copy of the LED current. If CTR × IF is more than the resistor allows, the transistor saturates: VCE collapses to VCE(sat) (typically 0.1–0.3 V) and the output is a clean logic low.

Saturated when   CTRworst × IF ≥ (VCC − VCE(sat)) / RL
  • Overdrive factor k = CTR × IF × RL / (VCC − VCE(sat)). Switching designs want k ≥ 2 at end of life.
  • More overdrive → lower VCE(sat), but longer storage time at turn-off (Section 7).
Output characteristic curves of I_C versus V_CE for I_F from 0.5 to 5 mA with a dashed load line for 5 V and 1 kilohm, and a shaded saturation region below 0.3 volts
Figure 4. Output characteristics with a 1 kΩ load line. At 1 mA the curve crosses the load line in the active region (VCE ≈ 3.5 V). At 3 mA or more the crossing is in the shaded saturation region.
Animation: as I_F increases, the operating point moves up the load line from the active region into the saturation region and V_CE drops to about 0.2 volts
Animation 2. Increasing IF slides the operating point up the load line. Once it enters saturation, doubling IF again barely changes VOUT. It only buys margin against CTR loss, at the cost of speed.
Worked example — will a 3.3 V logic output reach a valid low?
VCC = 3.3 V, RL = 4.7 kΩ, IF = 2 mA, unranked PC817 (CTRmin 50 %), temperature factor 0.8, end-of-life factor 0.5.
  1. Current needed to saturate: (3.3 − 0.2) / 4.7 kΩ ≈ 0.66 mA.
  2. Worst-case available: 2 mA × 0.50 × 0.8 × 0.5 = 0.40 mA. k ≈ 0.61, so the output is not saturated.
  3. VOUT = 3.3 − 0.40 mA × 4.7 kΩ ≈ 1.42 V. That is above VIL for 3.3 V CMOS, so the input reads an undefined level.
  4. Fix: IF = 5 mA gives k ≈ 1.5. Better still, 5 mA with rank B (130 %) gives k ≈ 4, or raise RL to 10 kΩ if the slower edges are acceptable.

Calculator: Saturation Checker

Enter the worst-case CTR you trust (datasheet minimum × temperature × ageing factors) and the circuit values. The checker tells you whether the output saturates, the overdrive factor, and the resulting output-low voltage.

Current to saturate–
Worst-case IC available–
Overdrive factor k–
Estimated VOUT (low state)–
IF for k = 2–
–

Switching times are defined on the output waveform between the 10 % and 90 % points. With a pull-up resistor, the output is inverted: turning the LED on makes the output fall.

Timing diagram with an LED current pulse and the inverted output voltage, marking delay time t_d, fall time t_f, storage time t_s and rise time t_r between the 10 and 90 percent levels
Figure 5. ton = td + tf and toff = ts + tr. In phototransistor parts toff is almost always the longer one.
IntervalPhysical causeWhat makes it longer
td (delay)LED turn-on plus charging the base node until the transistor starts to conductLow IF; large junction capacitance
tf (output fall)Collector current rising while the collector node slews downLarge RL (Miller); low overdrive
ts (storage)Excess charge stored in the saturated base must be removed before IC can fallDeep saturation (high overdrive k); no base discharge path
tr (output rise)Collector current decaying while CCB is charged back through RLLarge RL; high hFE; large CCB

The Miller effect: why RL dominates speed

The large light-collecting base–collector junction has a capacitance CCB of the order of 10 pF. It connects the base (driven only by micro-amps of photocurrent) to the collector (swinging by volts across RL). Seen from the base, that capacitance is multiplied by the stage’s voltage gain, roughly gm·RL. A useful engineering approximation for the dominant time constant is:

τ ≈ τ0 + hFE · CCB · RL     tr ≈ 2.2 τ
  • τ0 — intrinsic base time constant with RL → 0 (≈ 1–2 µs for PC817-class parts)
  • hFE·CCB·RL — the Miller term. It grows linearly with RL.
Worked example — checking the model against a datasheet
PC817 datasheets quote tr ≈ 4 µs typ at RL = 100 Ω, IC = 2 mA. Model: τ = 1.5 µs + 270 × 10 pF × 100 Ω = 1.77 µs → tr ≈ 3.9 µs. With RL = 10 kΩ: τ ≈ 1.5 + 27 = 28.5 µs → tr ≈ 63 µs, sixteen times slower from the same part. Datasheet “response time vs RL” curves show the same trend.
Animation drawing the output voltage for three load resistors, 100 ohms, 1 kilohm and 10 kilohms, with the same LED pulse; the 10 kilohm output rises much more slowly after the LED turns off
Animation 3. Same part, same 5 mA pulse. With 100 Ω the edges are fast, but 10.6 mA only swings the output by about 1 V (not a logic signal). With 10 kΩ the output swings rail to rail but turns off in tens of microseconds. Choosing RL is a speed-versus-swing trade-off.

Speed-up techniques

Base resistor RBE (6-pin parts)

Gives stored base charge a discharge path and shunts slow photocurrent tails. It speeds turn-off and cuts storage time. The cost: it steals ≈ VBE/RBE of photocurrent, so CTR drops, especially at low IF.

Keep the collector still

Drive the collector into a low-impedance node (a common-base transistor or a trans-impedance amplifier). With little voltage swing there is no Miller multiplication.

Avoid deep saturation

Size overdrive for end-of-life margin, not 10×. Every extra factor of overdrive adds storage time (≈ τs·ln k).

Or change the part

Above ≈ 20–50 kbit/s a photodiode-output part (6N136, 6N137) or a digital isolator is usually the right answer, not a heavily tuned phototransistor.

Interactive: Switching-Waveform Simulator

A square LED pulse drives a PC817-class model with a pull-up to VCC = 5 V. Vary RL, IF and RBE and watch ton, toff and the output swing. The time axis rescales automatically.

Operating mode–
Output swing–
ton = td + tf–
toff = ts + tr–
Rough max. toggle rate–
–

Teaching model: τ = (τ0 + hFE·CCB·RL)·RBE/(RBE + 200 kΩ), ts = τs·ln k, and RBE steals 0.55 V/RBE of photocurrent. Trends are realistic; absolute times vary by part and vendor.

In an SMPS feedback loop the optocoupler never switches. It sits in its active region and passes small changes of LED current to the primary side. For that job you need the small-signal (incremental) CTR and the frequency response, not the DC CTR.

Equivalent circuit: LED side with dynamic resistance; detector side with a photocurrent source into the base node, C_BE, a Miller capacitance C_CB from base to collector, a gm current source and load resistor R_L
Figure 6. Small-signal equivalent circuit. The photocurrent source feeds a base node loaded by CBE and the Miller-multiplied CCB. The result is a single dominant pole whose frequency falls as RL rises.
CTRss = ΔIC / ΔIF     fopto ≈ 1 / (2πτ) = 1 / (2π(τ0 + hFE·CCB·RL))
  • CTRss is the slope of the IC–IF curve at the bias point. It differs from the DC CTR because CTR itself varies with IF.
  • fopto — the “opto pole”. It adds phase lag to the loop and must be included in compensation.
Worked example — opto pole in a TL431 + PC817 loop
Primary-side pull-up RL = 4.7 kΩ, bias IC ≈ 1 mA (hFE ≈ 290 in the model), CCB ≈ 10 pF, τ0 ≈ 1.5 µs.
  1. τ = 1.5 µs + 290 × 10 pF × 4.7 kΩ ≈ 15 µs.
  2. fopto = 1 / (2π × 15 µs) ≈ 10.6 kHz.
  3. A loop crossing over at 2–3 kHz sees roughly 11–16° of extra phase lag from the optocoupler alone. Doubling RL to raise gain moves the pole down to ≈ 5.5 kHz and doubles that lag.
  4. Real opto poles vary widely with part, bias current and temperature (a few kHz to tens of kHz are common). Measure it with a network analyzer before closing a demanding loop. Module 10 shows how.
Design trap — compensating with the typical CTR. Loop gain is proportional to CTRss. A rank that spans 130–260 %, plus ageing and temperature, changes loop gain by 3–4× across units and life. Design the compensation for stability at maximum CTR and adequate regulation at minimum CTR.
Four conversions

CTR = ηEQE × ηc × ηdet × hFE. Under 1 % of LED electrons become photocurrent; hFE does the rest.

Extraction limits the LED

Total internal reflection in high-index GaAs keeps external efficiency at a few percent.

The junction is a current source

Photocurrent is linear in light and almost independent of voltage: ℛ = η·λ/1240 A/W.

CTR is a curve

It peaks at a few mA, falls at both current extremes and at both temperature extremes, and collapses at low VCE.

Saturation needs overdrive

Switching designs need CTRworst·IF ≥ 2× the load current at end of life.

RL sets speed

τ ≈ τ0 + hFE·CCB·RL: the Miller term makes large pull-ups slow.

Turn-off is the slow edge

Storage time grows with overdrive; RBE helps but costs CTR.

Loops see a pole

The opto pole (typically a few kHz to tens of kHz) and CTR spread must be part of loop compensation.

Working-principle design checklist

Tick items as you review a design. Your ticks are saved in this browser only.

Four parts: multiple choice, true/false, a matching exercise and three engineering scenarios. Score 80 % on the multiple choice to pass the module.

Part A — Multiple Choice

Question 1 of 12  •  Score: 0/12

Part B — True or False

Score: 0/8

Part C — Match the Term to Its Meaning

Drag each term onto its definition, or click a term and then click a definition.

Placed: 0/6

Part D — Engineering Scenarios

Scenario 1 — The PWM signal that lost its duty cycle
A 10 kHz, 50 % duty PWM signal is isolated with a PC817: IF = 10 mA, RL = 10 kΩ to 5 V. On the scope the isolated output is badly distorted: the low pulses are much longer than 50 µs. Explain and fix it.
Analysis. Needed IC is only 0.48 mA while CTR×IF is ≈ 20 mA, so the overdrive k is ≈ 40. Storage time is ≈ τs·ln 40 (several µs). Worse, the Miller time constant with 10 kΩ is τ ≈ 1.5 + 225×10 pF×10 kΩ ≈ 24 µs, so tr ≈ 53 µs. The output cannot return high within a 50 µs half-period, so the low time stretches. Fix: use RL ≈ 1 kΩ with IF sized for k ≈ 2–3 at end of life (τ ≈ 4 µs, tr ≈ 9 µs). Add RBE on a 6-pin part if needed. For tight duty accuracy, move to a 6N137-class logic-output part or a digital isolator.
Scenario 2 — Low-power input in a hot cabinet
To save power, a 24 V digital input drives a PC817 rank B (CTR ≥ 130 % at 5 mA) at only IF = 1 mA. It must saturate a 10 kΩ pull-up to 3.3 V at 85 °C after 10 years (ageing factor 0.5). Does it work?
Analysis. Needed: (3.3 − 0.2)/10 kΩ = 0.31 mA. CTR at 1 mA ≈ 130 % × 0.70 (IF curve) ≈ 91 %. At 85 °C ≈ ×0.83 → 76 %. At end of life ×0.5 → 38 %. Available 1 mA × 0.38 = 0.38 mA, so k ≈ 1.2. It saturates, but with almost no margin, and only if the typical curves hold for your units. Fix: raise IF to 2 mA (k ≈ 3.2 after re-reading both curves at 2 mA), or use a higher rank. Low-IF designs lose twice: CTR is lower at low current and more temperature-sensitive there.
Scenario 3 — More gain, less stability
A flyback’s TL431 + PC817 loop was stable with a 4.7 kΩ primary-side pull-up. To increase low-frequency gain, a colleague changed it to 22 kΩ. The output now rings after load steps. Crossover is about 2 kHz. What happened?
Analysis. The opto pole moved. With 4.7 kΩ: τ ≈ 15 µs → fopto ≈ 10.6 kHz, which costs about 11° at 2 kHz. With 22 kΩ: τ ≈ 1.5 + 290×10 pF×22 kΩ ≈ 65 µs → fopto ≈ 2.4 kHz, which costs about 40° at 2 kHz. On top of that, the gain rose 4.7×, pushing crossover higher where the lag is even worse. Phase margin collapses. Fix: restore the pull-up, get the gain from the TL431 compensation network, and include the measured opto pole in the loop design (Module 10).

Additional Resources

Datasheet curves to study

PC817 / TLP785: CTR vs IF, CTR vs TA, response time vs RL. 4N35: the base pin and RBE curves. 6N135/6N136: the photodiode current and output-transistor gain shown separately.

Application notes

Vendor optocoupler application notes on CTR, response time and RBE speed-up (Vishay, Toshiba, Renesas, onsemi) • SMPS loop-design literature on characterising the optocoupler pole (TL431 + optocoupler compensation).

Physics background

Any semiconductor-device text chapters on LEDs (radiative vs non-radiative recombination, extraction), photodiodes (responsivity) and BJT switching (charge-control model, storage time, Miller effect).

Keep learning

Module 5 compares the output families. Module 6 turns these mechanisms into datasheet parameters. Module 9 adds ageing. Module 10 designs complete circuits, including the feedback loop.